Rem, Martin and Mead, Carver (1981) A Notation for Designing Restoring Logic Circuitry in CMOS. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 399-411. https://resolver.caltech.edu/CaltechCONF:20120508-142455789
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Abstract
We introduce a programming notation in which every syntactically correct program specifies a restoring logic component, i.e., a component whose outputs are permanently connected, via "not too many" transistors, to the power supply. It is shown how the specified components can be translated into transistor diagrams for CMOS integrated circuits . As these components are designed as strict hierarchies, it is hoped that the translation of the transistor diagrams into layouts for integrated circuits can be accomplished mechanically.
Item Type: | Book Section | ||||||
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Additional Information: | The research described in this paper was sponsored by the Defense Advanced Research Projects Agency, ARPA Order Number 3771, and monitored by the Office of Naval Research under contract number N00014-79-C-0597. | ||||||
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Record Number: | CaltechCONF:20120508-142455789 | ||||||
Persistent URL: | https://resolver.caltech.edu/CaltechCONF:20120508-142455789 | ||||||
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Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
ID Code: | 239 | ||||||
Collection: | CaltechCONF | ||||||
Deposited By: | Kristin Buxton | ||||||
Deposited On: | 09 May 2012 17:21 | ||||||
Last Modified: | 03 Oct 2019 22:50 |
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