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VLSI Design Methodology: The Problem of the 80's for Microprocessor Design

Lattin, Bill (1979) VLSI Design Methodology: The Problem of the 80's for Microprocessor Design. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 247-252. https://resolver.caltech.edu/CaltechCONF:20120504-141256416

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Abstract

The rapid evolution of semiconductor technology continues to make possible increasingly sophisticated electronic systems on single chips of silicon. By 1982, a single silicon chip is projected to have well over 100,000 transistors. This level of complexity represents a major problem for the VLSI designer in the 1980's. Unless there is a major change in design methodology, this level of VLSI technology will be grossly under-utilized due to the problems of design, layout and checking. With present design methods, a 100,000 transistor MOS chip will take 60 man years to layout and another 60 man years to debug.


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Record Number:CaltechCONF:20120504-141256416
Persistent URL:https://resolver.caltech.edu/CaltechCONF:20120504-141256416
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ID Code:177
Collection:CaltechCONF
Deposited By: Kristin Buxton
Deposited On:08 Aug 2012 22:23
Last Modified:03 Oct 2019 22:50

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