Published June 22, 2001
| Submitted
Technical Report
Open
Speed and Energy Performance of an Asynchronous MIPS R3000 Microprocessor
Chicago
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Abstract
This paper presents the speed and energy figures for an asynchronous implementation of a MIPS R3000 microprocessor. The design is almost entirely QDI and introduces a new fine-grained pipeline. The performance figures show that this design is four times as efficient as equivalent clocked designs and that its cycle time in FO4 units compares to that of high-performance dynamic pipelines.
Additional Information
© 2001 California Institute of Technology. The research described in this paper was sponsored by the Defense Advanced Research Projects Agency and monitored by the Air Force under contract F29601-00-K-0184.Attached Files
Submitted - 2001_mipsresults.ps
Submitted - CSTR2001.pdf
Files
CSTR2001.pdf
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Additional details
- Eprint ID
- 27033
- Resolver ID
- CaltechCSTR:2001.012
- Defense Advanced Research Projects Agency (DARPA)
- Air Force Office of Scientific Research (AFOSR)
- F29601-00-K-0184
- Created
-
2002-09-25Created from EPrint's datestamp field
- Updated
-
2020-07-13Created from EPrint's last_modified field
- Caltech groups
- Computer Science Technical Reports