Published 1993
| Submitted
Technical Report
Open
Tomorrow's Digital Hardware will be Asynchronous and Verified
- Creators
- Martin, Alain J.
Chicago
An error occurred while generating the citation.
Abstract
Encouraged by the results of almost a decade of research and experimentation, we claim that tomorrow's design methods for digital VLSI will be based on a concurrent programming approach to high-level synthesis, asynchronous techniques, and correctness-preserving program transformations.
Additional Information
© 1993 California Institute of Technology. The research described in this paper would not have been possible without the contributions of my present and recent students. Dražen Borković, Steve Burns (now at the University of Washington), Marcel van der Goot, Pieter Hazewindus, Tony Lee, Christian Nielsen, and José Tierno. The insights, help, and encouragement of my Caltech colleague Charles L. Seitz are deeply appreciated. The research was sponsored by the Defense Advanced Research Projects Agency DARPA Order number and monitored by the Office of Naval Research under contract number N00014-87-K-0745.Attached Files
Submitted - 93-26.pdf
Submitted - postscript.ps
Files
93-26.pdf
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Additional details
- Eprint ID
- 26766
- Resolver ID
- CaltechCSTR:1993.cs-tr-93-26
- Defense Advanced Research Projects Agency (DARPA)
- Office of Naval Research (ONR)
- N00014-87-K-0745
- Created
-
2001-04-25Created from EPrint's datestamp field
- Updated
-
2019-10-03Created from EPrint's last_modified field
- Caltech groups
- Computer Science Technical Reports
- Series Name
- Computer Science Technical Reports