Design of Cryogenic SiGe Low-Noise Amplifiers

Creators: Weinreb, Sander; Bardin, Joseph C.; Mani, Hamdi

Abstract

This paper describes a method for designing cryogenic silicon-germanium (SiGe) transistor low-noise amplifiers and reports record microwave noise temperature, i.e., 2 K, measured at the module connector interface with a 50-Ω generator. A theory for the relevant noise sources in the transistor is derived from first principles to give the minimum possible noise temperature and optimum generator impedance in terms of dc measured current gain and transconductance. These measured dc quantities are then reported for an IBM SiGe BiCMOS-8HP transistor at temperatures from 295 to 15 K. The measured and modeled noise and gain for both a single- and two-transistor cascode amplifier in the 0.2-3-GHz range are then presented. The noise model is then combined with the transistor equivalent-circuit elements in a circuit simulator and the noise in the frequency range up to 20 GHz is compared with that of a typical InP HEMT.

Additional Information

© Copyright 2007 IEEE. Reprinted with permission. Manuscript received May 10, 2007; revised August 6, 2007. [Posted online: 2007-11-12] This work was supported by the Director's Fund of the Jet Propulsion Laboratory, California Institute of Technology, under a contract with the National Aeronautics and Space Administration. The authors appreciate the help of the Mixed Signal and RF Group, California Institute of Technology, Pasadena, particularly, Prof. A. Hajimiri and A. Babakhani for sample transistors and help with the IBM process. The authors thank Prof. D. Rutledge and G. Jones, both with the California Institute of Technology, for helpful discussions of the work and R. Gawande and G. Wang, both with the California Institute of Technology, for early studies and measurements of SiGe devices. The authors appreciate the help of N. Wadefalk, Chalmers University, Göteborg, Sweden, for contributions to the noise measurement calibration and amplifier testing and construction techniques. The tested transistors were processed by IBM under the Trusted Foundry Program and further processing of the authors' designs in this program is under the sponsorship of Dr. K. Johnson, U.S. Naval Observatory, Washington, DC.

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