Welcome to the new version of CaltechAUTHORS. Login is currently restricted to library staff. If you notice any issues, please email coda@library.caltech.edu
Published January 1988 | Published
Journal Article Open

The reliability of single-error protected computer memories

Abstract

The lifetimes of computer memories which are protected with single-error-correcting-double-error-detecting (SEC-DED) codes are studies. The authors assume that there are five possible types of memory chip failure (single-cell, row, column, row-column and whole chip), and, after making a simplifying assumption (the Poisson assumption), have substantiated that experimentally. A simple closed-form expression is derived for the system reliability function. Using this formula and chip reliability data taken from published tables, it is possible to compute the mean time to failure for realistic memory systems.

Additional Information

© 1988 IEEE. Reprinted with permission. Manuscript received June 5, 1984; revised June 10, 1985. R. Goodman was supported by Caltech's Program in Advanced Technologies, sponsored by Aerojet General, General Motors, GTE, and TRW. R. McEliece was supported by a grant from IBM.

Attached Files

Published - BLAieeetc88.pdf

Files

BLAieeetc88.pdf
Files (617.0 kB)
Name Size Download all
md5:37dfa2c0559840d8e465cbd379a02237
617.0 kB Preview Download

Additional details

Created:
August 22, 2023
Modified:
October 16, 2023