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Published March 2023 | public
Book Section - Chapter

FPGA Implementation of an Adaptive Sweep Algorithm for Spacecraft Radios

Abstract

Spacecraft communicate with the Deep Space Network (DSN) at a predetermined carrier frequency. However, signals are Doppler shifted away from the original transmitted frequency due to the high orbital velocities of the spacecraft. This paper describes the implementation of an adaptive sweep algorithm on a Xilinx Kintex-7 field-programmable gate array (FPGA). This algorithm estimates the carrier Doppler shift and compensates for it to allow for coherent data demodulation. The algorithm is implemented in MATLAB's Simulink, complied to Verilog using HDL Coder, and run on the FPGA using the FPGA-in-the-loop Wizard. The FPGA implementation has been validated in the presence of noise, by comparing the standard deviation of the Doppler residuals at different signal-to-noise ratios, to values obtained via a theoretical analysis of the carrier synchronization loop. Results indicate excellent agreement and thus validate our implementation. We have also tested the algorithm against flight data obtained from the Lunar Reconnaissance Orbiter (LRO) and the Deep Space Network (DSN), and proven that the algorithm can successfully acquire and track the carrier.

Additional Information

© 2022 IEEE. This research was carried out at the Jet Propulsion Laboratory, California Institute of Technology, and was sponsored by the Summer Undergraduate Research Fellowship (SURF) program and the National Aeronautics and Space Administration (80NM0018D0004). We would like to thank Dr. Chung-En Zah and Dr. Li Fung Change for generously funding this project in honor of Dr. Robert J. McEliece and Dr. David Rutledge.

Additional details

Created:
August 20, 2023
Modified:
October 23, 2023