Realizing symmetry-protected topological phases in a spin-1/2 chain with next-nearest-neighbor hopping on superconducting qubits
Abstract
Quantum simulation on near-term quantum hardware is a topic of intense interest. The preparation of novel quantum states of matter provides a quantitative assessment of the capabilities of near-term digital quantum computers to implement circuits with structure of relevance to quantum simulation. Here, we conduct a benchmark study by realizing symmetry-protected topological (SPT) phases of a spin-1/2 Hamiltonian with next-nearest-neighbor hopping on up to 11 qubits on a programmable superconducting quantum processor using adiabatic state preparation. Using recompilation techniques to reduce the gate count to around 50 two-qubit gates, we observe clear signatures of the two distinct SPT phases, such as excitations localized to specific edges and finite string-order parameters. We identify a parasitic phase associated with the two-qubit gate as the dominant imperfection that limits the depth of the circuits, indicating a research topic of interest for future hardware development.
Additional Information
© 2023 American Physical Society. The authors thank M. Wojciech, N. C. Rubin, Z. Jiang, and R. Babbush for helpful discussions. A.T.K.T., S.-N.S., A.J.M., and G.K.-L.C. were supported by the U.S. NSF under Award No. 1839204. R.N.T. was supported by the U.S. Department of Energy, Office of Basic Energy Sciences, under Award No. DE-SC0019374.Attached Files
Published - PhysRevA.107.032614.pdf
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Additional details
- Eprint ID
- 121107
- Resolver ID
- CaltechAUTHORS:20230420-574389200.10
- NSF
- CCF-1839204
- Department of Energy (DOE)
- DE-SC0019374
- Created
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2023-04-29Created from EPrint's datestamp field
- Updated
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2023-04-29Created from EPrint's last_modified field