Published March 2020
| public
Book Section - Chapter
A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link
Abstract
In order to meet the demand for increasingly higher data rate wireless links, broad-bandwidth transceivers that support high-spectral-efficiency modulation schemes are required. In this paper, a mm-wave transceiver IC operating at 113GHz is demonstrated, achieving a single-channel data rate of 80Gb/s. The transceiver achieves a high level of integration, including LO generation circuitry, a bits-to-RF TX DAC, and two transceiver channels for polarization diversity. The chip is flip-chip packaged onto a PCB with two orthogonally polarized antennas.
Additional Information
© 2020 IEEE. This work was supported in part by the ComSenTer research center, under the JUMP program, a Semiconductor Research Corporation program sponsored by DARPA. The authors would also like to acknowledge TSMC for chip fabrication, Integrand Software for EMX electromagnetic simulation. Many thanks to Cyril Luxey and Diane Titz of University of Nice Sophia Antipolis for many helpful discussions regarding the antenna design. Finally, the authors would like to thank the BWRC sponsors, students, and staff.Additional details
- Eprint ID
- 102953
- Resolver ID
- CaltechAUTHORS:20200430-152742107
- Defense Advanced Research Projects Agency (DARPA)
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2020-05-01Created from EPrint's datestamp field
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2021-11-16Created from EPrint's last_modified field