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Published December 10, 2008 | public
Book Section - Chapter

The Complexity of SPP Formula Minimization

Abstract

Circuit minimization is a useful procedure in the field of logic synthesis. Recently, it was proven that the minimization of ( ∨ , ∧ ,¬) formulae is hard for the second level of the polynomial hierarchy [BU08]. The complexity of minimizing more specialized formula models was left open, however. One model used in logic synthesis is a three-level model in which the third level is composed of parity gates, called SPPs. SPPs allow for small representations of Boolean functions and have efficient heuristics for minimization. However, little was known about the complexity of SPP minimization. Here, we show that SPP minimization is complete for the second level of the Polynomial Hierarchy under Turing reductions.

Additional Information

© 2008 Springer-Verlag Berlin Heidelberg. Supported by NSF CCF-0346991, CCF-0830787 and BSF 2004329.

Additional details

Created:
August 22, 2023
Modified:
January 14, 2024