Low-Power Circuits for Brain-Machine Interfaces
Abstract
This paper presents work on ultra-low-power circuits for brain-machine interfaces with applications for paralysis prosthetics, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; radio-frequency (RF) impedance modulation for low-power data telemetry; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons. Experimental results from chips that have recorded from and stimulated neurons in the zebra-finch brain and from RF power-link systems are presented. Circuit simulations that have successfully processed prerecorded data from a monkey brain and from an RF data telemetry system are also presented.
Additional Information
© 2007 IEEE.Attached Files
Published - 04253076.pdf
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