A tunable concurrent 6-to-18 GHz phased-array system in CMOS

Abstract

This paper presents a scalable phased-array receiver system that covers a tritave bandwidth of 6-to-18 GHz implemented in a 130nm CMOS process. The single receiver element with a 10-bit phase shifting resolution achieves a maximum phase error of 2.5° within a baseband amplitude variation of 1.5dB for an arbitrary target angle. This dense interpolation provides excellent phase error/offset calibration capability in the array. A 4-element electrical array pattern is measured at 6 GHz, 13.5 GHz and 18 GHz, showing a worst case peak-to-null ratio of 21.5dB. The EVM and phase noise improvements of the array compared with the single receiver element are also shown.

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