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Published December 21, 2016 | Submitted
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A multifold coincidence-veto circuit using transistors

Abstract

A versatile coincidence-anticoincidence circuit in the 50 nsec time range is described capable of being used with large number of counters. Basic considerations with detailed circuits, operation and performance are given.

Additional Information

© 1961 California Institute of Technology. This work was supported in part by the U.S. Atomic Energy Commission.

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Submitted - TR000514.pdf

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Created:
August 19, 2023
Modified:
January 13, 2024