Published February 7, 1961
| Submitted
Technical Report
Open
A multifold coincidence-veto circuit using transistors
Chicago
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Abstract
A versatile coincidence-anticoincidence circuit in the 50 nsec time range is described capable of being used with large number of counters. Basic considerations with detailed circuits, operation and performance are given.
Additional Information
© 1961 California Institute of Technology. This work was supported in part by the U.S. Atomic Energy Commission.Attached Files
Submitted - TR000514.pdf
Files
TR000514.pdf
Files
(8.6 MB)
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Additional details
- Eprint ID
- 73042
- DOI
- 10.7907/Z99C6VCB
- Resolver ID
- CaltechAUTHORS:20161221-065934762
- U. S. Atomic Energy Commission
- Created
-
2016-12-21Created from EPrint's datestamp field
- Updated
-
2019-10-03Created from EPrint's last_modified field
- Caltech groups
- Synchrotron Laboratory
- Series Name
- Synchrotron Laboratory
- Series Volume or Issue Number
- CTSL-17
- Other Numbering System Name
- CTSL
- Other Numbering System Identifier
- 17