Published March 2002
| public
Book Section - Chapter
An Energy Estimation Method for Asynchronous Circuits with Application to an Asynchronous Microprocessor
- Creators
- Pénzes, Paul I.
Chicago
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Abstract
This paper presents a simulator operating on a logical representation of an asynchronous circuit that gives energy estimates within 10% of electrical (hspice) simulation. Our simulator is the first such tool in the literature specifically targeted to efficient energy estimation of QDI asynchronous circuits. As an application, we show how the simulator has been used to accurately estimate the energy consumption in different parts of an asynchronous MIPS R3000 microprocessor. This is the first energy breakdown of an asynchronous microprocessor in the literature.
Additional Information
© 2002 IEEE. We wish to thank the members of the Asynchronous VLSI Group at Caltech for many stimulating discussions: Mika Nyströom, Catherine Wong, and Karl Papadantonakis, and Josée Tierno from IBM, TJ Watson Research Center. The research described in this paper was sponsored by the Defense Advanced Research Projects Agency and monitored by the Air Force under contract F29601-00-K-0184.Additional details
- Eprint ID
- 72644
- DOI
- 10.1109/DATE.2002.999207
- Resolver ID
- CaltechAUTHORS:20161207-164644888
- Defense Advanced Research Projects Agency (DARPA)
- F29601-00-K-0184
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2016-12-08Created from EPrint's datestamp field
- Updated
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2021-11-11Created from EPrint's last_modified field