DD1: A QDI, Radiation-Hard-by-Design, Near-Threshold 18uW/MIPS Microcontroller in 40nm Bulk CMOS

Abstract

This paper describes DD1, an asynchronous radiation-hard 8-bit AVR^® microcontroller (MCU) implemented in TSMC 40LP, a low-power bulk 40nm CMOS process. Designed for extreme reliability, DD1 uses quasi-delay-insensitive (QDI) asynchronous logic and contains full-custom radiation-hard memories and logic cells. The chip was found fully functional on first silicon over a range of operating voltages from near-threshold (500mV) to above the nominal V_(DD) (1.1V). It qualifies as both ultra-low power (<;100μW/MHz) and radiation-hard by design. At 550mV the MCU operates at 1MIPS with a power consumption of 18μW/MIPS. At 1.1V it runs at 20MIPS consuming 75μW/MIPS (1.5mW total). After extensive testing, it was found to be total-dose and latch-up immune and has an upset immunity of 2E-6 SEE/device-day (CREME96 geosynchronous near-earth orbit).

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