Published 1990
| Published
Book Section - Chapter
Open
Analog Circuits for Constrained Optimization
- Creators
- Platt, John C.
- Other:
- Touretzky, David S.
Chicago
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Abstract
This paper explores whether analog circuitry can adequately perform constrained optimization. Constrained optimization circuits are designed using the differential multiplier method. These circuits fulfill time-varying constraints correctly. Example circuits include a quadratic programming circuit and a constrained flip-flop.
Additional Information
© 1990 Morgan Kaufmann. This paper was made possible by funding from AT&T Bell Labs. Hardware was provided by Carver Mead, and Synaptics, Inc.Attached Files
Published - 245-analog-circuits-for-constrained-optimization.pdf
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245-analog-circuits-for-constrained-optimization.pdf
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Additional details
- Eprint ID
- 63482
- Resolver ID
- CaltechAUTHORS:20160107-162226619
- AT&T Bell Labs
- Created
-
2016-01-09Created from EPrint's datestamp field
- Updated
-
2019-10-03Created from EPrint's last_modified field
- Series Name
- Advances in Neural Information Processing Systems
- Series Volume or Issue Number
- 2