Published 1989
| Published
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An Analog VLSI Chip for Thin-Plate Surface Interpolation
- Creators
- Harris, John G.
- Other:
- Touretzky, David S.
Abstract
Reconstructing a surface from sparse sensory data is a well-known problem in computer vision. This paper describes an experimental analog VLSI chip for smooth surface interpolation from sparse depth data. An eight-node ID network was designed in 3J.lm CMOS and successfully tested. The network minimizes a second-order or "thinplate" energy of the surface. The circuit directly implements the coupled depth/slope model of surface reconstruction (Harris, 1987). In addition, this chip can provide Gaussian-like smoothing of images.
Additional Information
© 1989 Morgan Kaufmann. Support for this research was provided by the Office of Naval Research and the System Development Foundation. The author is a Hughes Aircraft Fellow and thanks Christof Koch and Carver Mead for their ongoing support. Additional thanks to Berthold Horn for several helpful suggestions.Attached Files
Published - 169-an-analog-vlsi-chip-for-thin-plate-surface-interpolation.pdf
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Additional details
- Eprint ID
- 63474
- Resolver ID
- CaltechAUTHORS:20160107-160701867
- Office of Naval Research (ONR)
- System Development Foundation
- Hughes Aircraft Company
- Created
-
2016-01-15Created from EPrint's datestamp field
- Updated
-
2019-10-03Created from EPrint's last_modified field
- Series Name
- Advances in Neural Information Processing Systems
- Series Volume or Issue Number
- 1