Low-noise custom VLSI for CdZnTe pixel detectors

Abstract

A custom analog VLSI chip is being developed for the readout of pixellated CdZnTe detectors in the focal plane of an astronomical hard X-ray telescope. The chip is intended for indium bump bonding to a pixel detector having pitch near 0.5 mm. A complete precision analog signal processing chain, including charge sensitive preamplifier, shaping amplifiers and peak detect and hold circuit, is provided for each pixel. Here we describe the circuitry and discuss the performance of a functional prototype fabricated in a 1.2um CMOS process at Orbit Semiconductor. Dynamic performance is found to be close to SPICE model predictions over a self-triggering range extending from 1 to 150 keV (200 to 30000 electrons). Integral nonlinearity (1 %) and noise (0.25 keV or 50 electrons FWHM with 200 fF input capacitance) while acceptable are not as good as predicted. Power consumption is only 250 uW per pixel. Layout and design techniques are discussed which permit successful self-triggering operation at the low 1 keV threshold.

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