A Charge-Based CMOS Parallel Analog Vector Quantizer
- Creators
- Cauwenberghs, Gert
- Pedroni, Volnei
Abstract
We present an analog VLSI chip for parallel analog vector quantization. The MOSIS 2.0 μm double-poly CMOS Tiny chip contains an array of 16 x 16 charge-based distance estimation cells, implementing a mean absolute difference (MAD) metric operating on a 16-input analog vector field and 16 analog template vectors. The distance cell including dynamic template storage measures 60 x 78 μm^2. Additionally, the chip features a winner-take-all (WTA) output circuit of linear complexity, with global positive feedback for fast and decisive settling of a single winner output. Experimental results on the complete 16 x 16 VQ system demonstrate correct operation with 34 dB analog input dynamic range and 3 μsec cycle time at 0.7 mW power dissipation.
Additional Information
© 1995 Massachusetts Institute of Technology. Fabrication of the CMOS chip was provided through the DARPA INSF MOSIS service. The authors thank Amnon Yariv for stimulating discussions and encouragement.Attached Files
Published - 947-a-charge-based-cmos-parallel-analog-vector-quantizer.pdf
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Additional details
- Eprint ID
- 55559
- Resolver ID
- CaltechAUTHORS:20150305-152558615
- Created
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2015-03-06Created from EPrint's datestamp field
- Updated
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2019-10-03Created from EPrint's last_modified field