Published 1989
| Published
Book Section - Chapter
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Winner-Take-All Networks of O(N) Complexity
- Other:
- Touretzky, D. S.
Abstract
We have designed, fabricated, and tested a series of compact CMOS integrated circuits that realize the winner-take-all function. These analog, continuous-time circuits use only O(n) of interconnect to perform this function. We have also modified the winner-take-all circuit, realizing a circuit that computes local nonlinear inhibition.
Additional Information
© 1989 Morgan Kaufmann. John Platt, John Wyatt, David Feinstein, Mark Bell, and Dave Gillespie provided mathematical insights in the analysis of the circuit. Lyn Dupre proofread the document. We thank Hewlett-Packard for computing support, and DARPA and MOSIS for chip fabrication. This work was sponsored by the Office of Naval Research and the System Development Foundation.Attached Files
Published - 151-winner-take-all-networks-of-on-complexity.pdf
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151-winner-take-all-networks-of-on-complexity.pdf
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Additional details
- Eprint ID
- 52787
- Resolver ID
- CaltechAUTHORS:20141212-145244773
- Hewlett-Packard
- Defense Advanced Research Projects Agency (DARPA)
- MOSIS
- Office of Naval Research (ONR)
- System Development Foundation
- Created
-
2014-12-18Created from EPrint's datestamp field
- Updated
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2019-10-03Created from EPrint's last_modified field