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A Comparison of MOS PLAs
- Creators
- Trimberger, Stephen
Abstract
This paper discusses Pl.A designs in three MOS technologies: NMOS, CMOS/SOS and CMOS-Bulk. The purpose of this paper is not to introduce a new and exciting PLA design, nor is it to recommend one fabrication technology over another. Its purpose is to use PLAs as a standard, hopefully familiar layout strategy so that new designers can get a better understanding of the advantages and disadvantages of all three technologies from a designer's viewpoint. It is hoped that this paper will provide more data to those who must select a technology for their integrated circuit fabrication.
Additional Information
This work was supported in part by the Deep Space Network. Larry Matheney of Synmos, Chuck Seitz of Caltech, and Tom Griswold all contributed greatly to my understanding of CMOS. Don Speck and Pete Hunter laid out the CMOS SOS PLA.Files
5059_TM_82.pdf
Files
(2.3 MB)
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Additional details
- Eprint ID
- 30296
- Resolver ID
- CaltechAUTHORS:20120424-143407144
- Deep Space Network
- Created
-
2012-05-01Created from EPrint's datestamp field
- Updated
-
2019-10-03Created from EPrint's last_modified field
- Caltech groups
- Computer Science Technical Reports
- Other Numbering System Name
- Computer Science Technical Memorandum
- Other Numbering System Identifier
- 5059