On Detection and Generation of Dead-lock free Reshuffling in the VLSI Synthesis Method
- Creators
- Xu, Jiazhao Jessie
Abstract
With the quick growth in the scale of VLSI circuits and the accordingly increasing complexity in the design of those large systems, the correctness of the design has demanded designers' attention. There are (recent) examples of microprocessors which have "bugs" in the designs and this raises questions about their reliability in performance. Personally, I am strongly against the popular use of word "bug" in the computer science world when people refer to their mistakes in the design. Mistake as defined by Webster is a wrong action or statement proceeding from faulty judgment, inadequate knowledge, or inattention; so it's not like a bug which crawls into our system on its own and ruins our life, but is a reflection of wrong decisions or of the inadequacy in our design methodology.
Additional Information
© 1996 California Institute of Technology. May 26, 1995; revised on July 31, 1995.Attached Files
Submitted - 96-10.pdf
Submitted - 96-10.ps
Files
Additional details
- Eprint ID
- 26891
- Resolver ID
- CaltechCSTR:1996.cs-tr-96-10
- Created
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2001-05-14Created from EPrint's datestamp field
- Updated
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2019-10-03Created from EPrint's last_modified field
- Caltech groups
- Computer Science Technical Reports