Concurrent Simulations of Plasma Reactors for VLSI Manufacturing
- Creators
- Rieffel, Marc A.
Abstract
Recent advances in microprocessor performance have been driven primarily by improvements in manufacturing technology. New processes and equipment have paved the way for smaller feature sizes and larger die sizes. These in tum have enabled the production of microprocessors with more transistors, operating at lower voltages and higher clock rates. One of the key pieces of equipment in microelectronics manufacturing is the plasma reactor, used in 30 to 40 percent of the processing steps. These reactors use plasmas, or energetic rarefied gases, to remove particles from, and deposit particles on, silicon wafers. Improving the design of these reactors, and the processes that they are used for, will enable the microelectronics industry to make smaller, cheaper, and faster microprocessors.
Additional Information
© 1995 California Institute of Technology. The author would like to thank Sadasivan Shankar for assistance with physics details and industrial guidance, David Weaver for Skipper information and DSMC fundamentals, and Mikhail Ivanov for validation suggestions. Evan Cohn provided Paragon support and optimization advice, Thanh Phung obtained the GEC results on the Paragon, presented in Section 6.2, and Jerrell Watts obtained the load balancing results in Section 6.5 and assisted with ports to the Intel Paragon and Cray T3D. Bradley Nelson wrote XHawk and the chemistry database and helped with the descriptions in Sections A.1 and A.2. Nathan Mates generated GEC pictures and movies presented in Chapter 6, and Jeffrey Ho created the plasma diagrams, Figures 1.2 and 1.3. Vince McKay contributed useful chemistry insights, and Paul Miller of Sandia provided detailed GEC reactor information. Robie Samanta Roy contributed editing suggestions. Lowell Morgan of Kinema Research proved Chlorine rate data, and Wayne Christopher and Diane Poirier of ICBM CFD assisted in grid generation and translation. Xiaolin Zhong at UCLA provided heat transfer data to help with validation, presented in Section 5.5. Johnson Wang from the Aerospace Corporation assisted with the development of the transformation algorithm in Section 4.4. Access to the Intel Paragon was provided by Caltech CACR. Access to a Cray T3D was provided by the NASA Jet Propulsion Laboratory, and was facilitated by Caltech. Stephen Taylor provided advice, support, and encouragement, as research advisor.Attached Files
Submitted - CS_TR_95_12.pdf
Submitted - CS_TR_95_12.ps
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Additional details
- Eprint ID
- 26885
- Resolver ID
- CaltechCSTR:1995.cs-tr-95-12
- Created
-
2001-05-14Created from EPrint's datestamp field
- Updated
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2019-10-03Created from EPrint's last_modified field
- Caltech groups
- Computer Science Technical Reports
- Series Name
- Computer Science Technical Reports