A Fully Integrated 24-GHz Eight-Element Phased-Array Receiver in Silicon
- Creators
- Guan, Xiang
- Hashemi, Hossein
- Hajimiri, Ali
Abstract
This paper reports the first fully integrated 24-GHz eight-element phased-array receiver in a SiGe BiCMOS technology. The receiver utilizes a heterodyne topology and the signal combining is performed at an IF of 4.8 GHz. The phase-shifting with 4 bits of resolution is realized at the LO port of the first down-conversion mixer. A ring LC voltage-controlled oscillator (VCO) generates 16 different phases of the LO. An integrated 19.2-GHz frequency synthesizer locks the VCO frequency to a 75-MHz external reference. Each signal path achieves a gain of 43 dB, a noise figure of 7.4 dB, and an IIP3 of -11 dBm. The eight-path array achieves an array gain of 61 dB and a peak-to-null ratio of 20 dB and improves the signal-to-noise ratio at the output by 9 dB.
Additional Information
"©2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE." Manuscript received April 19, 2004; revised July 15, 2004. The authors would like to acknowledge IBM Corporation for chip fabrication. They would also like to thank R. Aparicio, A. Natarajan, A. Komijani, D. Lu, M. Morgan, and Prof. D. Rutledge for valuable technical discussions, N. Wadefalk and A. Shen for their assistance preparing the printed circuit board and microwave package, and R. Chunara for providing the original version of the software for programming the phased-array receiver.Files
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Additional details
- Eprint ID
- 436
- Resolver ID
- CaltechAUTHORS:GUAieeejssc04b
- Created
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2005-06-18Created from EPrint's datestamp field
- Updated
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2021-11-08Created from EPrint's last_modified field