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Published December 1, 2006 | public
Journal Article Open

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas

Abstract

In this paper, we present the receiver and the on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52-GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0 dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +2 dBi.

Additional Information

© Copyright 2006 IEEE. Reprinted with permission. Manuscript received May 3, 2006; revised September 1, 2006. [Posted online: 2006-11-20] This work was supported in part by the National Science Foundation under Grant ECS- 0239343. The authors thank DARPA's trusted foundry program and IBM for the chip fabrication. They also appreciate valuable help from D. Rutledge, S. Weinreb, G. Rebeiz, T. Yu, Y. Wang, E. Keehr, A. Hassibi, and P. Focardi. The technical support for CAD tools from Agilent Technologies, Zeland Software Inc., Ansoft Corp., and Integrated Engineering Software is also appreciated.

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Created:
August 22, 2023
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October 16, 2023