Published November 27, 2006
| Published
Journal Article
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Design, Fabrication and Characterization of Parylene-Packaged Thin-Film Transistors
- Creators
- Lo, Hsi-wen
-
Tai, Yu-Chong
Abstract
A micro-fabricated parylene-packaged flexible pentacene thin film transistor is presented. Different from preceding devices that have been reported, this thin film transistor employs parylene as the substrate, the gate insulator and also the encapsulation layer. Also, this thin film transistor uses pentacene, an organic semiconductor with high mobility, as the active material. The transistor consists of Au/Cr gates and Au source and drain electrodes and takes a bottom-contact configuration. The freshly made thin film transistor shows a hole mobility of 0.084809 cm^2/V-s with an on-off ratio of 10^4.
Additional Information
© 2006 ECS - The Electrochemical Society. The authors would like to thank Mr. Trevor Roper for his assistance with equipment and fabrication. We would also thank Tanya Owen, Christine Matsuki and other members of the Caltech Micromachining Laboratory for their assistance.Attached Files
Published - ECS_Trans.-2006-Lo-273-8.pdf
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ECS_Trans.-2006-Lo-273-8.pdf
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Additional details
- Eprint ID
- 89619
- Resolver ID
- CaltechAUTHORS:20180913-133203426
- Created
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2018-09-13Created from EPrint's datestamp field
- Updated
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2021-11-16Created from EPrint's last_modified field