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Published February 1, 2018 | Accepted Version
Report Open

A 25 Input Pulse Height Recording System

Abstract

A general description is given of a data recording system which provides a link between counter experiments in high-energy physics and a high-speed digital computer. The instrument described can accept as many as 25 simultaneous photomultiplier tube signals and pulse height analyze them into 100 channels each. Six bits of digital data may be substituted for any unused pulse height input. The usual output is perforated paper tape with a binary coded decimal format for use with a Burroughs 220 computer. Identification words can be set up and recorded on the tape. The speed of the paper tape perforator limits the rate of analysis to one event per second. If the output data is fed directly into a computer memory, then the recording rate can be increased to 60 events per second. The instrument has been in operation since December 1961, and results obtained with it using both particles produced by the Caltech Synchrotron and pulsers are given. Only solid state components have been used, including nearly 1700 transistors and an equal number of diodes.

Additional Information

© 1962 California Institute of Technology. It would be nearly impossible to specifically acknowledge all the persons connected with the production of this instrument. The aid of Professor Matthew Sands in supplying over-all supervision of the project is gratefully appreciated. The cooperation of Ransom Research in solving the various technical and administrative difficulties involved was invaluable. Specifically, Mr. David Ransom, Sr., General Manager of Ransom Research and Vice-President of Wyle Laboratories, was most tolerant of the difficulties arising from a joint development project between an industrial concern and a university. Mr. Norman Grannis, of Ransom Research, was responsible for the design and operation of the Temporary Storage, Data Multiplexer, and the associated parts of the Control. Mr. Arpad Barna, then of Ransom Systems and now with the University of Chicago, supervised the construction of the Parallel to Serial Converter and the Analog to Digital Converter and designed the parts of the Control essential to their operation.

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Additional details

Created:
August 19, 2023
Modified:
January 14, 2024