VLSI partitioning of a 2-Gs/s digital spectrometer
- Creators
- Von Herzen, Brian
Abstract
A digital correlating spectrometer for radioastronomy that is based on a custom GaAs digitizer and a custom micropipelined CMOS correlator is described. The digitizer quantizes at two gigasamples per second (Gs/s) and 2-b resolution. A GaAs demultiplexer distributes the data into eight parallel streams of 250 Ms/s each. The CMOS correlator operates at 250 Ms/s using 20 mW per correlator lag. The correlator output is processed on a host microcomputer to create a 1-GHz spectrum of the input signal that can be displayed interactively. An 8*9-mm chip is being developed in a 2- mu process that contains 320 correlator lags. The design is partitioned into GaAs and CMOS components according to the required throughput at each stage of the system. The fastest signals (2 GHz) are kept on the chip level to minimize delay, crosstalk, system noise, and power consumption. Moderate-speed signals (250 MHz) are driven by GaAs components. CMOS components are used where high-speed outputs are not required. A strong synergy between the correlator architecture and micropipelined CMOS technology improves the performance by an order of magnitude compared to existing designs. Preliminary correlator chips have been built and tested at 250 Ms/s; final chips are under design.
Additional Information
© 1991 IEEE. Manuscript received September 20, 1990; revised January 10, 1991. This work was supported by the National Science Foundation through Grant AST 891-2705 to the Caltech Submillimeter Observatory.Attached Files
Published - 00078247.pdf
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Additional details
- Eprint ID
- 78348
- Resolver ID
- CaltechAUTHORS:20170619-162237333
- AST 891-2705
- NSF
- Created
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2017-06-20Created from EPrint's datestamp field
- Updated
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2021-11-15Created from EPrint's last_modified field