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Published September 2015 | public
Book Section - Chapter

A low-noise fully differential recycling folded cascode neural amplifier

Abstract

This paper describes the design of an amplifier to be used as part of a neural recording system. The architecture of this amplifier was based on a fully differential folded cascode (FDFC) amplifier and adapted to a recycling architecture which reuses currents in order to achieve better performance. Furthermore, as we are designing a neural amplifier, a low input-referred noise is required due to the small amplitude of neural signals, as they could be as small as 1 μV. The recycling architecture was optimized for low-noise, and simulated in AMS 0.35 μm CMOS process. An input-referred noise of 1.16 μV_(rms) was achieved while consuming 66.03 μW from a 3.3 V supply, which corresponds to NEF=2.58. The open-loop gain of the amplifier is 111.25 dB and the closed-loop gain is 42.10 dB with a bandwidth of 6.02 kHz.

Additional Information

© 2015 IEEE. Date of Conference: 24-27 Feb. 2015. Date Added to IEEE Xplore: 10 September 2015.

Additional details

Created:
August 20, 2023
Modified:
October 20, 2023