Published 1992
| Published
Book Section - Chapter
Open
A Parallel Analog CCD/CMOS Signal Processor
Abstract
A CCO based signal processing IC that computes a fully parallel single quadrant vector-matrix multiplication has been designed and fabricated with a 2μm CCO/CMOS process. The device incorporates an array of Charge Coupled Devices (CCO) which hold an analog matrix of charge encoding the matrix elements. Input vectors are digital with 1 - 8 bit accuracy.
Additional Information
© 1992 Morgan Kaufmann. This work was supported by a grant from the U.S. Army Center for Signals Warfare.Attached Files
Published - 477-a-parallel-analog-ccdcmos-signal-processor.pdf
Files
477-a-parallel-analog-ccdcmos-signal-processor.pdf
Files
(1.4 MB)
| Name | Size | Download all |
|---|---|---|
|
md5:d04a7a6e095da3ba5292a584b210e87a
|
1.4 MB | Preview Download |
Additional details
- Eprint ID
- 63787
- Resolver ID
- CaltechAUTHORS:20160119-165617767
- U.S. Army Center for Signals Warfare
- Created
-
2016-01-20Created from EPrint's datestamp field
- Updated
-
2019-10-03Created from EPrint's last_modified field
- Series Name
- Advances in Neural Information Processing Systems
- Series Volume or Issue Number
- 4