Welcome to the new version of CaltechAUTHORS. Login is currently restricted to library staff. If you notice any issues, please email coda@library.caltech.edu
Published 1990 | Published
Book Section - Chapter Open

Analog Circuits for Constrained Optimization

Abstract

This paper explores whether analog circuitry can adequately perform constrained optimization. Constrained optimization circuits are designed using the differential multiplier method. These circuits fulfill time-varying constraints correctly. Example circuits include a quadratic programming circuit and a constrained flip-flop.

Additional Information

© 1990 Morgan Kaufmann. This paper was made possible by funding from AT&T Bell Labs. Hardware was provided by Carver Mead, and Synaptics, Inc.

Attached Files

Published - 245-analog-circuits-for-constrained-optimization.pdf

Files

245-analog-circuits-for-constrained-optimization.pdf
Files (1.1 MB)

Additional details

Created:
August 19, 2023
Modified:
January 13, 2024