128-bit multicomparator
Abstract
A 128-bit multicomparator was designed to perform the search-sort function on arbitrary length data strings. Devices can be cascaded for longer block lengths or paralleled for bit-parallel, word-serial applications. The circuit utilizes a 3-phase static-dynamic shift register cell for data handling and a unique gated EXCLUSIVE-NOR circuit to accomplish the compare function. The compare operation is performed bit parallel between a `data' register and a `key' register with a third `mask' register containing DON'T CARE bits that disable the comparator. The multicomparator was fabricated using p-channel silicon-gate metal-oxide-semiconductor (MOS) technology on a 107/spl times/150 mil chip containing 3350 devices. With transistor-transistor logic (TTL) input, data rates in excess of 2 MHz have been attained. The average power dissipation was 250 mW in the dynamic mode and 300 mW in the static mode.
Additional Information
© 1976 IEEE. Manuscript received March 15, 1976; revised JulY 18, 1976. The authors are pleased to acknowledge Intel Corporation for wafer fabrication.Attached Files
Published - 01050799.pdf
Files
Name | Size | Download all |
---|---|---|
md5:3694889052c43e346d55a27daf241a57
|
624.4 kB | Preview Download |
Additional details
- Eprint ID
- 53685
- Resolver ID
- CaltechAUTHORS:20150114-095719979
- Created
-
2015-01-14Created from EPrint's datestamp field
- Updated
-
2021-11-10Created from EPrint's last_modified field