A Compact Transregional Model for Digital CMOS Circuits Operating Near Threshold
Abstract
Power dissipation is currently one of the most important design constraints in digital systems. In order to reduce power and energy demands in the foremost technology, namely CMOS, it is necessary to reduce the supply voltage to near the device threshold voltage. Existing analytical models for MOS devices are either too complex, thus obscuring the basic physical relations between voltages and currents, or they are inaccurate and discontinuous around the region of interest, i.e., near threshold. This paper presents a simple transregional compact model for analyzing digital circuits around the threshold voltage. The model is continuous, physically derived (by way of a simplified inversion-charge approximation), and accurate over a wide operational range: from a few times the thermal voltage to approximately twice the threshold voltage in modern technologies.
Additional Information
© 2013 IEEE. Manuscript received November 29, 2012; revised May 28, 2013; accepted August 20, 2013. Date of publication November 1, 2013; date of current version September 23, 2014. This work was supported by the National Science Foundation. The authors would like to thank S. S. Bhargav, C. Moore, and X. Chang for their excellent comments and helpful discussions.Additional details
- Eprint ID
- 51380
- DOI
- 10.1109/TVLSI.2013.2282316
- Resolver ID
- CaltechAUTHORS:20141106-133106801
- NSF
- Created
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2014-11-06Created from EPrint's datestamp field
- Updated
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2021-11-10Created from EPrint's last_modified field