Computing motion using analog VLSI vision chips: An experimental comparison among different approaches
Abstract
We have designed, built and tested a number of analog CMOS VLSI circuits for computing 1-D motion from the time-varying intensity values provided by an array of on-chip phototransistors. We present experimental data for two such circuits and discuss their relative performance. One circuit approximates the correlation model while a second chip uses resistive grids to compute zero-crossings to be tracked over time by a separate digital processor. Both circuits integrate image acquisition with image processing functions and compute velocity in real time. For comparison, we also describe the performance of a simple motion algorithm using off-the-shelf digital components. We conclude that analog circuits implementing various correlation-like motion algorithms are more robust than our previous analog circuits implementing gradient-like motion algorithms.
Additional Information
Cover Date: 1992-09-01. We thank Carver Mead for providing laboratory resources for the design and fabrication of the analog chips and Steve DeWeerth, John Harris, Andy Moore, and John Tanner for their help in getting these motion chips to work. We thank the Office of Naval Research, the National Science Foundation, Rockwell International Science Center, and Hughes Aircraft Corporation for financial support of VLSI research in our laboratory. W.B. was supported by a NSF Graduate Fellowship and performed some of the work described here at the Hughes Aircraft AI Center.Attached Files
Published - 370337.pdf
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Additional details
- Eprint ID
- 40401
- Resolver ID
- CaltechAUTHORS:20130816-103148678
- Office of Naval Research (ONR)
- NSF
- Rockwell International Science Center
- Hughes Aircraft Corporation
- NSF Graduate Fellowship
- Created
-
2010-03-11Created from EPrint's datestamp field
- Updated
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2021-11-09Created from EPrint's last_modified field
- Caltech groups
- Koch Laboratory (KLAB)